This application claims priority of Taiwan patent Application No. 90106523, filed on Mar. 20, 2001.
1. Field of the Invention
This invention relates to a method for manufacturing a low-profile semiconductor device.
2. Description of the Related Art
The sizes of semiconductor chips can vary widely with different chip packaging techniques. With the rapid advancement in electronic devices, minimization of profiles of semiconductor chips has been a major concern of manufacturers. Although the profiles of semiconductor chips can be made relatively low by current packaging techniques, there is still a need to further reduce the profiles of the semiconductor chips.
Therefore, the main object of the present invention is to provide a method for manufacturing a semiconductor device with a low-profile.
Another object of the present invention is to provide a low-profile semiconductor device.
According to one aspect of the present invention, there is provided a method for manufacturing a semiconductor device. The method comprises the steps of: preparing a semiconductor chip having a pad-mounting surface provided with a plurality of bonding pads thereon; preparing a substrate formed with a plurality of spaced apart bump receiving holes therein and having a trace layout surface that is formed with a plurality of conductive traces thereon which are to be respectively and electrically connected to the bonding pads and which have contact portions respectively adjacent to peripheries of the bump receiving holes; forming a plurality of conductive bumps respectively on the bonding pads of the semiconductor chip, the conductive bumps respectively having top portions; laying the substrate over the pad-mounting surface of the semiconductor chip such that the trace layout surface is distal from the pad-mounting surface and such that the top portions of the conductive bumps respectively extend through the bump receiving holes; and forming a plurality of conductive bodies, each of which encloses and electrically connects the top portion of a respective one of the conductive bumps to the contact portion of a respective one of the conductive traces.
According to another aspect of the present invention, a semiconductor device comprises: a semiconductor chip having a pad-mounting surface that is provided with a plurality of bonding pads thereon and a plurality of conductive bumps which are respectively formed on the bonding pads and which respectively have top portions; a substrate formed with a plurality of spaced apart bump receiving holes therein and having a trace layout surface that is formed with a plurality of conductive traces thereon which are to be respectively and electrically connected to the bonding pads and which have contact portions respectively adjacent to peripheries of the bump receiving holes, the substrate being laid over the pad-mounting surface of the semiconductor chip such that the trace layout surface is distal from the pad-mounting surface and such that the top portions of the conductive bumps respectively extend through the bump receiving holes; and a plurality of conductive bodies, each of which encloses and electrically connects the top portion of a respective one of the conductive bumps to the contact portion of a respective one of the conductive traces.